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Implementation of Subthres hold Adiabatic Logic for Ultra low Power Application
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3,500.00
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Intelligent FPGA Data Acquisition Framework
₹
3,500.00
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Intend and Implementation of Automatic V ending Machine using VHDL
₹
3,000.00
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Knowledge Based Neural Network Model for FPGA Logical Architecture Development
₹
3,500.00
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Low Cost High Performance VLSI Architecture for Montgomery Modular Multiplication
₹
3,500.00
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Low power delay product dynamic CMOS circuit design techniques
₹
3,500.00
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Low Power Pulse Triggered Flip Flop Design Based on a Signal Feed Through
₹
3,000.00
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Low-Complexity Low-LatencyArchitecture for Matching of Data Encoded With Hard Systematic Error-Correcting Code
₹
3,000.00
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Low-Computing-Load High-Parallelism Detection Method based on Chebyshev Iteration for Massive MIMO Systems with VLSI
₹
3,500.00
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Low-Power Digital Signal Processor Architecture for Wireless Sensor Nodes
₹
3,000.00
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Low-Power Programmable PRPG With Test Compression Capabilities
₹
3,500.00
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Low‑power-half‑select-free-single‑ended-10-transistor-SRAM-cell
₹
4,500.00
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Majority-Based Test Access Mechanism forParallel Testing of Multiple Identical Cores
₹
3,500.00
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Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells
₹
3,500.00
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Novel Radiation-Hardened-by-Design RHBD 12T Memory Cell for Aerospace Applications in Nanoscale CMOS Technology
₹
3,500.00
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Novel VLSI Architecture for Real Time Medical Image Segmentation
₹
3,500.00
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Optimized Active Single Miller Capacitor Compensation With Inner Half Feed for ward Stage for Very High Load Three Stage OTAs
₹
4,500.00
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Performance Analysis of a Low Power High Speed Hybrid 1 bit Full Adder Circuit
₹
3,500.00
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Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation
₹
3,500.00
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Precise VLSI Architecture for AI Based 1-D/ 2-D Daub-6 Wavelet Filter Banks With Low Adder-Count
₹
3,000.00
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Rate-0.96 LDPC Decoding VLSI for Soft-Decision Error Correction of NAND Flash Memory
₹
3,000.00
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RegularRoute An Efficient Detailed Router Applying Regular Routing Patterns
₹
3,000.00
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Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches
₹
3,500.00
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Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy Block
₹
3,500.00
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Resource Shared Crypto Coprocessor of AES Enc Dec With SHA 3
₹
6,000.00
Original price was: ₹6,000.00.
₹
5,500.00
Current price is: ₹5,500.00.
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RoBA Multiplier A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing
₹
3,500.00
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Runtime Adaptive Circuit Switching and Flow Priority in NoC-Based MPSoCs
₹
3,500.00
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Scan Test Bandwidth Management for Ultralarge Scale System on Chip Architectures
₹
3,500.00
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Secure Binary Image Steganography Based on Minimizing the Distortion on the Texture
₹
3,500.00
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simplifying Clock Gating Logic by Matching Factored Forms
₹
3,000.00
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Single Ended 9T SRAM Cell for Near Threshold Voltage Operation With Enhanced Read Performance in 22 nm FinFET Technology
₹
3,500.00
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Single Event Performance of Sense Amplifier Based Flip Flop Design in a 16 nm Bulk FinFET CMOS Process
₹
3,500.00
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Sliced Message Passing: High Throughput Overlapped Decoding of High-Rate Low-Density Parity-Check Codes
₹
3,000.00
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Smart Reliable Network-on-Chip
₹
3,000.00
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Stable Reliable and Bit-Interleaving 12T SRAM for Space Applications A Device Circuit Co-design
₹
3,500.00
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Star Type Architecture with Low Transmission Latency for a 2D Mesh NOC
₹
3,500.00
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Test Compaction by Sharing of Transparent-Scan Sequences Among Logic Blocks
₹
3,000.00
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Threshold Logic Computing Memristive CMOS Circuits for Fast Fourier Transform and Vedic Multiplication
₹
3,500.00
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TOWARD MULTI-GIGABIT WIRELESS: DESIGN OF HIGH-THROUGHPUT MIMO DETECTORS WITH HARDWARE-EFFICIENT ARCHITECTURE
₹
3,000.00
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Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing
₹
3,500.00
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Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM
₹
3,500.00
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Ultra low Voltage High Speed Flash ADC Design Strategy Based on For M Delay Product
₹
3,500.00
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Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design
₹
3,500.00
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Unified VLSI architecture for photo core transform used in JPEG XR
₹
3,500.00
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VLSI Computational Architectures for the Arithmetic Cosine Transform
₹
3,500.00
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VLSI Design for SVM-Based Speaker Verification System
₹
3,500.00
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VLSI Implementation of a Cost-Efficient Micro Control Unit with an Asymmetric Encryption for Wireless Body Sensor Networks
₹
3,500.00
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WIFI NEIGHBOR AWARENESS NETWORKING
₹
3,500.00
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