Description

A Schmitt-trigger-based single-ended 11T SRAM cell, which significantly improves read and write static noise margin (SNM) and consumes low power. Simulation results show that the cell also achieves the lowest leakage power dissipation among the cells considered for comparison. We also investigate the impact of process, voltage, and temperature variations on various performance parameters, such as hold SNM, read SNM, write margin, immunity to half-select issue, ION/IOFF ratio of read path, and leakage power of the cell; Monte Carlo simulation results confirm the robustness of the proposed cell toward these issues. Layout drawn in a 45-nm technology rule shows that the proposed cell occupies 2.02× greater area as compared with 6T SRAM cells.