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A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell
PROJ7158_01
PROJ7158_02
A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell
PROJ7158_01
PROJ7158_02

Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC

SKU: PROJ7158
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Rs4,500.00

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A glitch reduction approach by dynamic capacitance compensation of binary-weighted current switches in a current-steering digital-to-analog converter (DAC). The method was proved successfully by a 10-bit 400-MHz pure binary-weighted currentsteering DAC with a minimum number of retiming latches. The experiment results yield very low-glitch energy during major carry transitions at output, which is

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A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell

Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC

Write a review
Our Price

Rs4,500.00