Product | Details | Total |
---|---|---|
![]() | A Low-Latency and Low-Power Hybrid Scheme for On-Chip Networks Rs3,000.00 Network-on-Chip (NoC) architectures represent a promising design paradigm to cope with increasing communication requirements in… | Rs3,000.00 |
![]() | CMCS: Current-Mode Clock Synthesis Rs4,500.00 In a high-performance VLSI design, the clock network consumes a significant amount of power… | Rs4,500.00 |
![]() | Median Robust Extended Local Binary Patternfor Texture Classification Rs4,500.00 Local binary patterns (LBP) are considered among the most computationally efficient high-performance texture features… | Rs4,500.00 |
![]() | Resource Shared Crypto Coprocessor of AES Enc Dec With SHA 3 Previous price: Save Rs500.00 Cryptographic co-processors are integral to the modern System-on-Chips. Flexibility in such designs serves dual purpose… | Rs5,500.00 |
![]() | DWT BASED FEATURE EXTRACTION FOR IRIS RECOGNITION USING GENETIC ALGORITHM Rs6,500.00 Existing image enhancement methods have problems of a slow data transmission and poor conversion effect… | Rs6,500.00 |
Cart totals
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SubtotalRs24,000.00
9% CGSTRs2,160.00
9% SGSTRs2,160.00
Total
Rs28,320.00