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VLSI-FPGA

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Analysis and Optimization of Product-Accumulation Section for Efficient Implementation of FIR Filters

Most of the research on the implementation of finite impulse response (FIR) filter so far focuses ..

4,500.00INR
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Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation

The Booth multiplier has been widely used for high performance signed multiplication by encoding a..

4,500.00INR
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Assessing the Suitability of King Topologies for Interconnection Networks

In the late years many different interconnection networks have been used with two main tendencies...

4,500.00INR
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AWARE (Asymmetric Write Architecture with REdundant blocks): A High Write Speed STT-MRAM Cache Architecture

Flip-flops are basically used as data storage elements. Such data storage can be used for storage of..

3,000.00INR
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Bit-Interleaving-Enabled 8T SRAM With Shared Data-Aware Write and Reference-Based Sense Amplifier

Proposes the design of a low-voltage static random access memory (SRAM) for biomedical chip applic..

4,500.00INR
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Built-In Self-Test Methodology With Statistical Analysis for Electrical Diagnosis of Wearout in a Static Random Access Memory Array

 Present an electrical diagnosis methodology for a variety of wearout mechanisms, including b..

4,500.00INR
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CMCS: Current-Mode Clock Synthesis

In a high-performance VLSI design, the clock network consumes a significant amount of power. While..

4,500.00INR
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CMOS Integrated Time Mode Temperature Sensor for Self Refresh Control in DRAM Memory Cell

The product proposes a CMOS smart temperature sensor for a self-refresh controller in DRAM memory ce..

4,500.00INR
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Compensation Method for Multistage Opamps With High Capacitive Load Using Negative Capacitance

It is shown that negative capacitance (NC) circuits can be systematically used to improve the gain..

4,500.00INR
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Computing Seeds for LFSR-Based Test Generation From Nontest Cubes

It is necessary to ensure the faultless test generation when designing the circuits. For that we h..

4,500.00INR
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Content Addressable Memory Early Predict and Terminate Precharge of Match Line

Remote data access control is of crucial importance in public cloud. Based on its own inclinations, ..

3,500.00INR
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Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm

The filter process mainly used to DSP and DIP real world application. The filter process to remove t..

3,000.00INR
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Design and Analysis of a Highly Efficient Linearized CMOS Subharmonic Mixer for Zero and Low-IF Applications

The distortion analysis of a linearized CMOS subharmonic mixer (SHM) based on a Volterra series an..

4,500.00INR
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Design of a CMOS System-on-Chip for Passive, Near-Field Ultrasonic Energy Harvesting and Back-Telemetry

Many packaging and structural materials are made of conductive materials such as metal or carbon-f..

4,500.00INR
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Design of an offset-tolerant voltage sense amplifier bit-line sensing circuit for SRAM memories

The design of a new bit-line sensing scheme of SRAM memories is presented, which combines offset c..

4,500.00INR
Showing 31 to 45 of 112 (8 Pages)
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