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Analysis and Design of an E-Band Transformer-Coupled Low-Noise Quadrature VCO in 28-nm CMOS
VLSI Design for SVM-Based Speaker Verification System
Rs3,500.00

This brief presents the chip implementation of a support vector machine (SVM)-based speaker verification system…

Rs3,500.00
Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication
Memory-Reduced Turbo Decoding Architecture Using NII Metric Compression
Rs4,500.00

A new compression technique of next-iteration initialization metrics for relaxing the storage demands of…

Rs4,500.00

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SubtotalRs8,000.00
9% CGSTRs720.00
9% SGSTRs720.00
Total
Rs9,440.00
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