Description

Field Programmable Gate Arrays (FPGA) are a type of hardware logic device that have the flexibility to be programmed like a general-purpose computing platform (e.g. CPU), yet retain execution speeds closer to that of dedicated hardware (e.g. ASICs). Traditionally, FPGAs have been used to prototype Application Specific Integrated Circuits (ASICs) with the intent of being replaced in final production by their corresponding ASIC designs. Only in the last decade have lower FPGA prices and higher logic capacities led to their application beyond the prototyping stage, in an approach known as reconfigurable computing. A question remains concerning the degree to which reconfigurable computing has benefited from recent improvements in the state of FPGA technologies / tools. This thesis presents a Reconfigurable Architecture for Implementing ANNs on FPGAs as a case study used to answer this question. Now a days, the FPGA technology is to modify the structure level for DIP, DSP, data processing, telecommunication, industrial control applications. This technology is improve the many application performance level and to reduce the overall area, speed and power in any application system. We propose a new modeling approach based on knowledge-based neural network (KBNN) for FPGA logical architecture development compare to existing neural network methodology. Our proposed work is to design a efficient VLSI architecture based FPGA area identification system. This system is to analysis feature value for different core digital architecture and to classify circuit details effectively.