Description

Content-addressable memory (CAM) is a special type of computer memory used in certain very-high-speed searching applications. It is also known as associative memory, associative storage, or associative array, although the last term is more often used for a programming data structure. It compares input search data against a table of stored data, and returns the address of matching data. In this architecture, we have proposed a high-throughput low-energy content-addressable memory (CAM) based on a reordered overlapped search mechanism that includes two new approaches, a reordered word-overlapped search (RWOS) and phase-overlapped processing (POP). An efficient hardware solution to perform table lookup is the content addressable memory (CAM). A CAM can be used as a co-processor for the network processing unit (NPU) to offload the table lookup tasks. Besides the networking equipment, CAMs are also attractive for other key applications such as translation look-aside buffers (TLBs) in virtual memory systems. Ternary content addressable memories (TCAMs) are hardware-based parallel lookup tables with bit-level masking capability. A special logic unit, named Multiple Match Resolver (MMR), is required to resolve the best candidate if more than one words indicate a “match”. In the early development of TCAM, the capacity was small, with only a few hundred to several thousand words. The design of MMR was relatively easy, and could be realized using static digital logics. They are attractive for applications such as packet forwarding and classification in network routers. Despite the attractive features of TCAMs, high power consumption is one of the most critical challenges faced by TCAM designers. This work proposes circuit techniques for reducing TCAM power consumption. The main contribution of this work is divided in two parts: (i) reduction in match line (ML) sensing energy, and (ii) static-power reduction techniques. The ML sensing energy is reduced by employing (i) positive-feedback ML sense amplifiers (MLSAs), (ii) low-capacitance comparison logic, and (iii) low-power ML-segmentation techniques. Here this technique was used in CAM memory which is combined with RAM memory to enhance the performance level while searching data from memory. The focus of this work is not on the TCAM memory cell design, but rather, it is on the low-power circuit techniques for multiple match resolution and detection in TCAM. Both digital techniques and mixed-signal techniques are presented and analyzed in details.