The VLSI architecture is used to enhance all type of digital signal and digital image based applications. A real-time wavelet-based denoising technique was implemented on FPGA to remove power-line from speech signal. The FPGA based logical architecture is to implement the noise removing process in real speech signal. The VLSI architecture is to optimize the filtering architecture and to improve the system performance using the Stationary Wavelet Transform. Our phase-2 work is to modify filtering architecture using simulink based XILINX block design. This design is to convert the VHDL code and to simulate the result. In various applications, including communication systems, biomedical engineering, and industrial applications. In this review, we have classified the existing noise cancellation schemes and comprehensively explore various suggestions in each category as to demonstrate limitations of the existent techniques as well as effective contributions. A platform on FPGA for Hearing – Aid and showed the possible ways to get efficient design using DSP techniques . Using the DWT – OLA, the speech signal is segmented without any distortion. The efficacy of the algorithm was evaluated using subjects with and without hearing deficiency. Listening tests showed that the proposed algorithm increases the quality and intelli gibility of the denoised speech.