An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR Interpolation Filter for Multistandard DUC
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Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip.. The microprocessor is a VLSI device. VLSI technology may be moving toward further radical miniaturization with introduction of NEMS technology. Vlsi technology is used to modify the any type digital based hardware architecture and to reduce the hardware system power, speed and complexity level. The problem of finding the decomposition with the fewest operations is known as Multiple Constant Multiplication (MCM). The MCM problem is particularly relevant for the multiplier less implementation of digital finite impulse response (FIR) filters but also for matrix-vector products with a fixed matrix, which includes linear signal transforms. Liang and Tran such as the discrete Fourier transform or the discrete cosine transform. In this system the system proposes a DUC based FIR filter architecture. This architecture is to modify the internal component count level. Fir filter architecture is used to effectively remove the noise in received channel data bits and to require less circuit complexity.
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