Most of the time this is a straightforward challenge for the electronic designer, because there are many power-delivery solutions. Yet sometimes a device has no direct power source, and running wires or replacing batteries is impractical. So enter energy harvesting. Energy harvesting allows electronics to operate where there is no conventional power source, thus eliminating the need for wires or replacement batteries. Now a days, the communication industry field is mainly focused by high data transfer and more channel capacity in mobile communication. VLSI technology is used to modify the any type digital based hardware architecture and to reduce the hardware system power, speed and complexity level. FIR filter architecture is used to effectively remove the noise in received channel data bits and to requires less circuit complexity. In this architecture, our work is to design the 32-tab FIR filter architecture using droop detection functional block. This block is used to reduce the data energy loss for register shifting function. This kind of FIR channel filter architecture is to increase the system performance level. Existing method is to design a bulk driven current generator and current trimming based voltage reference circuits. This circuit is modify the sub threshold reference voltage circuit. Proposed system is to a 32-tab FIR filter architecture with minimum energy droop detection functional block. This function is to reduce the unwanted data loss for register shift operation. Proposed system is consist of more no of D-register, adder, multiplier elements. The d-register function block is consists of droop detection, counter, digital controller. Proposed system is to focus the energy level prediction in register clocking section and to reduce the unwanted clock pulse data generation for 320tab FIR filter architecture.