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ProductDetailsTotal
A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC
Rs4,500.00

The typical computer architecture for SoCs consists of one or more processors with a…

Rs4,500.00
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation
New Low Glitch and Low Power DET Flip-Flops Using Multiple C-Elements
Rs4,500.00

This paper presents novel designs of static dual-edgetriggered (DET) flip-flops that exhibit unique circuit…

Rs4,500.00
Quaternion-Michelson Descriptor for Color Image Classification
Optimal Channel Switching Over Gaussian Channels Under Average Power and Cost Constraints
Rs3,500.00

…

Rs3,500.00
Half-Quadratic-Based Iterative Minimization for Robust Sparse Representation
An Automatic Graph-Based Approach forArtery/Vein Classification in Retinal Images
Rs3,000.00

An Automatic Graph-Based Approach for Artery/Vein Classification in Retinal Images” The classification of retinal vessels…

Rs3,000.00

Cart totals

SubtotalRs15,500.00
9% CGSTRs1,395.00
9% SGSTRs1,395.00
Total
Rs18,290.00
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