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A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme
A digital-to-analog converter (DAC) is a function that converts digital data into an analog signal. ..
A 65 nm Cryptographic Processor for High Speed Pairing Computation
Cryptographic processors are becoming the standard way to enforce data-usage policies. The designers..
A Bidirectional Three-level LLC Resonant Converter with PWAM Control
Accurate dynamic models for power converters are of great importance during the compensator design p..
A Capacitor Voltage-Balancing Method for Nested Neutral Point Clamped (NNPC) Inverter
In this project using of flying capacitors a newly voltage balancing NNPC inverter had been develo..
A Comparative Study of Power Supply Architectures in Wireless EV Charging Systems
Wireless inductive power transfer is a transformational and disruptive technology that enables the r..
A Coordinated Control Approach for DC link and Rotor Crowbars to Improve Fault Ride-Through of DFIG based Wind Turbine
Nowadays, most double fed induction generators (DFIGs) based wind turbines are equipped with rotor ..
A Current Control Scheme of Brushless DC Motors Driven by Four-Switch Three-Phase Inverters
Based on brushless DC motors (BLDCM) driven by four-switch three-phase inverter (FSTPI), a current ..
A Dual Series-Resonant DC-DC Converter
A dual series-resonant DC-DC converter with zero voltage switching (ZVS) and zero current switching..
A Fast Commutation Error Correction Method for Sensorless BLDC Motor Considering Rapidly Varying Rotor Speed
Accurate commutation point is essential to ensure the ideal torque performance and low power consum..
A Fault Tolerant Technique Using Quadded Logic and Quadded Transistors
Now a days, core processor consists of more no of complex digital architecture. This architecture is..
A Frequency-Domain Adaptive Filter (FDAF) Prediction Error Method (PEM) Framework for Double-Talk-Robust Acoustic Echo Cancellation
A new framework to tackle the double-talk (DT) problem in acoustic echo cancellation (AEC). It is ba..
A Highly Reliable and High Efficiency Quasi Single-Stage Buck-Boost Inverter
To regulate an output ac voltage in inverter systems having wide input dc voltage variation, a buc..
A Highly Reliable and High Efficiency Quasi Single-Stage Buck-Boost Inverter
To regulate an output ac voltage in inverter systems having wide input dc voltage variation, a buck..
A Low-Complexity Sequential Video Compression Scheme Using Frame Differential Directional Filter Bank Decomposition in CIE La b Color Space
This paper proposes a novel differential directional filter bank (DFB) decomposition-based video co..