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An Event-Based Neural Network Architecture With an Asynchronous Programmable Synaptic Memory

Product Code:PROJ3568
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  • 3,000.00INR

Spiking Neural networks used to represent good Processing speed. Spiking neural networks (SNNs) are the third generation of neural network models, they increasing the level of reality in a neural network simulation. The idea is that neurons in the SNN will not vary at each propagation cycle. In existing system they implemented neural network with programmable synaptic memory. synaptic weight refers to the strength of a connection between two nodes. The design of neural network architecture is based on CMOS technology, and the design performed in its Architecture level. Commonly CMOS technology provides less noise during design. Their proposed Neural network consists the concepts of Synaptic weight and spiking Network. In the existing system, the concentrated only in spike frequency and spike voltage. By the following Proposed system we are focused on complexity and efficiency. We are proposing the network using CMOS technology with quad bilateral is a technique used in integrated circuit design to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use. And also multiple threshold voltages applied to the circuit. Which helps to reduce the delay/power. In addition to reducing stand-by or leakage power. This approach eliminates Critical path delay. In Our design we concentrated on complexity, hence the power consumption will be reduced. And also efficiency will be increased due to less complexity.


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Tags: 2014, Domain > Network Projects

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