An Analog VLSI Implementation of the Inner Hair Cell and Auditory Nerve Using a Dual AGC Model
An analog VLSI implementation is to implement the inner hair cell and auditory nerve circuits. These circuits using the dual mode AGC model CMOS architecture. The inner hair cell means more no of CMOS transistor circuit arrangements. The biomimetic auditory processor is used to the audio signal integrating process and to increase the frequency range. This processor is using noise removing process to the input audio signal. An analog inner hair cell, auditory nerve circuit based on the optimized VLSI CMOS circuit process. This process is used for the biomimetic auditory processor application. The inner hair cell and auditory nerve process consists the HWR, LPF, FBCM and multiplier blocks. This block is used to perform the dual mode AGC process. The ACG process is used to increase the frequency range of analog current process in the biomimetic auditory processor application. In our architecture, the CMOS design for HWR and the LPF architecture. This architecture used to envelope follower process. This envelope follower process used to apply the differential input to the AGC blocks. The Half wave rectifier block used to half rectify the differential current inputs for the inner hair cell process. The low pass filter is used to filter the differential input signal and to remove the noise effect. Our proposed work is to design the LPF and HWR architecture design and the proposed work is to design the multiplier and current buffer architecture. This design was developed the tanner 13.0 software.
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