FPGA Projects
Fault-Tolerant-Parallel-Filters-Based-on-Error-Correction-Codes
The power consumption and speed are the two main challenging factors in Very Large Scale Integrated ..
Fixed-Point Computing Element Design for Transcendental Functions and Primary Operations in Speech Processing
A fixed-point architecture based on a reconfigurable scheme for integrating several commonly used ..
FPGA-Based-Implementation-&-Power-Analysis-of-Parameterized-Walsh-Sequences
The digital architecture is mainly used in all type of real world application architectures and thus..
Frequency-Boost Jitter Reduction for Voltage-Controlled Ring Oscillators
Ring oscillators (ROs) are popular due to their small area, modest power, wide tuning range, and e..
Fully Integrated 10-GHz Active Circulator and Quasi-Circulator Using Bridged-T Networks in Standard CMOS
A three-port active circulator and an active quasicirculator (QC) based on bridged-T networks (BTN..
Hard-Information Bit-Reliability Based Decoding Algorithm for Majority-Logic Decodable Nonbinary LDPC Codes
A modified bit-reliability based decoding algorithm is presented based on a recent work by Huang e..
Hardware and Energy-Efficient StochasticLU Decomposition Scheme for MIMO Receivers
We design a hardware and energy-efficient stochastic lower–upper decomposition (LUD) scheme for mu..
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels
VLSI technology is to optimize the any type of digital architecture. Because this type of optimizat..
High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator
A high-speed, low-power, and highly reliable frequency multiplier is proposed for a delay-locked l..
High-throughput-pipelined-2D-Discrete-cosine-transform-for-video-compression
The objective of Video/image compression is to reduce irrelevance and redundancy of the Video/image ..
Hybrid LUT/Multiplexer FPGA Logic Architectures--XILINX
Hybrid configurable logic block architectures for field-programmable gate arrays that contain a mi..
Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures
Coarse-grained reconfigurable architecture (CGRA) is a promising architecture with high performanc..
In-Field Test for Permanent Faults in FIFO Buffers of NoC Routers
An on-line transparent test technique for detection of latent hard faults which develop in firstin..
Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding
The field of approximate computing has received significant attention from the research community ..
Intend and Implementation of Automatic V ending Machine using VHDL
Design of area- and power-efficient high-speed data path logic systems are o..