FPGA Projects
A Simple FPGA System for ECG R R Interval Detection
This paper presents the design of a fully integrated electrocardiogram (ECG) signal processor (ESP) ..
A-Thermal-Energy-Harvesting-Power-Supply-With-an-Internal-Startup-Circuit-for-Pacemakers
Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combini..
Achieving Optimal Efficiency in Energy Transfer to a CMOS Fully Integrated Wireless Power Receiver
The design and measurement of an inductive link for transferring energy to a fully integrated wire..
An active merchant balun and its application to a 24-ghz cmos mixer
A fully integrated 24-GHz Gilbert-cell mixer incorporating two on-chip Marchand baluns to convert ..
An Area and Power Efficient Adder-Based Stepwise Linear Interpolation for Digital Signal Processing
Linear interpolation is frequently used in digital signal processing applications to reconstruct s..
An Area-Efficient High-Resolution Resistor-String DAC with Reverse Ordering Scheme for Active Matrix Flat-Panel Display Data Driver Ics
An area-efficient high-resolution resistor-string digital-to-analog converter (R-DAC) with a rever..
An Efficient On-Chip Switched-Capacitor-Based Power Converter for a Microscale Energy Transducer
An efficient on-chip inductor-less switching power converter for solar energy harvesting is presen..
An Efficient Single and Double-Adjacent Error Correcting Parallel Decoder for the (24,12) Extended Golay Code
Channel coding is commonly incorporated to obtain sufficient reception quality in wireless mobile c..
Analysis and Optimization of Product-Accumulation Section for Efficient Implementation of FIR Filters
Most of the research on the implementation of finite impulse response (FIR) filter so far focuses ..
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation
The Booth multiplier has been widely used for high performance signed multiplication by encoding a..
Assessing the Suitability of King Topologies for Interconnection Networks
In the late years many different interconnection networks have been used with two main tendencies...
AWARE (Asymmetric Write Architecture with REdundant blocks): A High Write Speed STT-MRAM Cache Architecture
Flip-flops are basically used as data storage elements. Such data storage can be used for storage of..
Bit-Interleaving-Enabled 8T SRAM With Shared Data-Aware Write and Reference-Based Sense Amplifier
Proposes the design of a low-voltage static random access memory (SRAM) for biomedical chip applic..
Built-In Self-Test Methodology With Statistical Analysis for Electrical Diagnosis of Wearout in a Static Random Access Memory Array
Present an electrical diagnosis methodology for a variety of wearout mechanisms, including b..
CMCS: Current-Mode Clock Synthesis
In a high-performance VLSI design, the clock network consumes a significant amount of power. While..