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A Computationally Efficient Reconfigurable FIR Filter Architecture Based on Coefficient

Brand:VLSIHut
Product Code:PROJ7217
Availability:In Stock
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  • 4,500.00INR

Reconfigurable digital filter is being widely used in applications such as communication and signal processing. Its performance, power consumption, and logic resource utilization are the major factors to be taken into consideration when designing the filters. This paper proposes a concise canonic signed digit coefficient grouping method aiming at reducing the number of common subexpressions (CSs).



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Tags: VLSI-Verilog-VHDL-Xillinx-CMOS-TannerTool-FPGA

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