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Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications

Brand:Image Atlas
Product Code:PROJ5223
Availability:In Stock
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  • 3,500.00INR

Recent medical field technologies are mainly used in advanced systems and equipments. So we analysis disease types and effectively classify final reports. VLSI based DSP systems are to modify the internal circuit structure level and to optimize the circuit complexity level and to improve the system quality. Most digital signal processing algorithms are specified with floating-point data types but they are finally implemented in fixed-point architectures in order to satisfy the cost and power consumption constraints of embedded systems. Our proposed work is to design a efficient VLSI architecture based DSP feature extraction and classification system. This work is to design DFT feature extraction and SVM classifier architecture. Proposed system is to design a DFT feature extraction architecture and multi SVM classifier architecture. This work is to optimize the circuit complexity level. Our proposed work is ECG signal feature extraction and classification application process. This application uses life threading QRS detecting process for this project. Our proposed work is only focus the SVM classifier internal architecture. This work is to modify the exponent processing element architecture. But it not suitable for overall system circuit complexity optimization level. So we modify the LPCC feature extraction process and normal PE architecture. Our phase-1 work is to design DFT (discrete Fourier Transform) architecture for feature extraction process and multiplier less normal processing element in SVM classifier architecture. This feature extraction process is used to effectively collect the input signal information and to improve the classification accuracy level. our phase-1 work is to reduce the overall processing time and to reduce the power consumption level.


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Tags: 2015, digital image processing, VLSI

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