CMOS Projects
LUT Optimization for Distributed Arithmetic-B Block Least Mean Square Adaptive Filter
We analyze the contents of lookup tables (LUTs) of distributed arithmetic (DA)-based block l..
4,500.00INR
MACS: A Highly Customizable Low-Latency Communication Architecture
Network-on-Chip (NoC) architectures represent a promising design paradigm to cope with increasing ..
4,500.00INR
Modeling and design of EMI-Immune opamps in 0.18-um CMOS technology
The modeling and design of Miller-based operational amplifier structures that are highly immune to..
4,500.00INR
Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs
It is necessary to ensure any leakages which cause the read sensing failure and degrade..
4,500.00INR
Tunable CMOS Delay Gate With Improved Matching Properties
The main objective of the proposed work is to obtain the low power in the tunable delay gate model. ..
3,000.00INR
Unified-VLSI-architecture-for-photo-core-transform-used-in-JPEG-XR
Unified VLSI architecture for photo core transform used in JPEG XR’, the authors proposed a ..
4,500.00INR