CMOS Projects
Analysis and Design of an E-Band Transformer-Coupled Low-Noise Quadrature VCO in 28-nm CMOS
An E-band quadrature voltagecontrolled oscillator implemented in 28-nm CMOS. Two fundamental oscil..
Analysis and Design of an Ultrabroadband Stacked Power Amplifier in CMOS Technology
This brief presents the analysis and design of a twostage stacked power amplifier (PA) with very b..
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC
The typical computer architecture for SoCs consists of one or more processors with a memory subsys..
Built-In Self-Test and Digital Calibration of Zero-IF RF Transceivers
A built-in self-test (BIST) or built-in test (BIT) is a mechanism that permits a machine to test i..
Computing Seeds for LFSR-Based Test Generation From Nontest Cubes
It is necessary to ensure the faultless test generation when designing the circuits. For that we h..
Detection of Superpoints Using a Vector Bloom Filter
Internet attacks, such as distributed denial-ofservice attacks and worm attacks, are increasing in..
Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip
As transistor density continues to increase with the advent of nanotechnology, reliability issues ..
Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic
The digital architecture is mainly used in all type of real world applicat..
Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC
A glitch reduction approach by dynamic capacitance compensation of binary-weighted current switche..
High sensitivity CMOS RF-DC converter in HF RFID Band
A fully-integrated RF-DC converter operating at the HF RFID working frequency (13.56 MHz) and real..
High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m)
An efficient pipelined architecture of elliptic curve scalar multiplication (ECSM) over GF(2m). Th..
High-Power CMOS Current Driver With Accurate Transconductance for Electrical Impedance Tomography
A current driver is used to control another circuit or other component, such as a high-power transis..
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels
VLSI technology is to optimize the any type of digital architecture. Because this type of optimizat..
Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line Voltage
SRAM is basically used as data storage elements. In SRAM(Static RAM), During Read operation, Dynamic..
Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication
The digital architecture is mainly used in all type of real world application architectures and th..