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Timing Error Tolerance in Small Core Designs for SoC Applications

Timing Error Tolerance in Small Core Designs for SoC Applications

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 Timing Error Tolerance in Small Core Designs for SoC Applications

 Timing errors are an increasing reliability concern in nanometer technology, high complexity and multi-voltage/frequency integrated circuits. A local error detection and correction technique is presented in this work that is based on a new bit flipping flip-flop. Whenever a timing error is detected, it is corrected by complementing the output of the corresponding flip-flop. The proposed solution is characterized by very low silicon area and power requirements compared to previous design schemes in the open literature.


 


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  • Model: PROJ7189
  • 999 Units in Stock
  • Manufactured by: ClickMyProjects

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This product was added to our catalog on Monday 12 June, 2017.

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